This new one-day course covers advanced EMC and Signal Integrity
concerns for digital logic systems operating with clock frequencies
from
several hundred MHz up to a few GHz. The seminar covers important
printed circuit board (PCB) layout features including the
characteristics
and properties of ground planes. The characteristics of various
transmission
line structures such as microstrip, stripline and coplanar transmission
lines are also covered.
Signal Integrity issues such as ringing, delay, crosstalk, and skew, and the affect of vias are discussed. Various methods of performing Signal Integrity analysis are explained, as well as the advantages and accuracy of each approach. Also covered are issues pertaining to high density interconnect such as: chip scale packaging (CSP), microvia technology, PCB losses (skin effect & dielectric loss), and trace bandwidth. The advantages and disadvantages of both standard and new technological approaches are explained.
A desirable prerequisite to this seminar is a basic working knowledge of fundamental digital design and layout techniques. This knowledge can come from experience, or by having attending one of our multi-day EMC courses.
Outline
High Speed Design IssuesIC Technology PredictionsNew Design Methodologies Controlling D-M Radiation ---Cancellation Techniques ---Spread Spectrum Clocks Ground Plane Impedance Controlling C-M Emission Differential Signaling ---Characteristics of LVDS ---PCB Layout For LVDS Transmission LinesProperties of a Transmission Line---Characteristic Impedance ---Propagation Delay Basic Transmission Line Equations Transmission Line Structures ---Microstrip ---Stripline ---Coplanar Right Angle Bends Spice Simulation Termination Guidelines Specifying Controlled Impedance PCBs Test Coupons/Stacking Stripes Transmission Line Rules of Thumb Signal IntegrityWhat is Signal Integrity?The Four Causes of Signal Distortion |
Signal Integrity Concerns
---Ringing ---Delay ---Crosstalk ---Skew ---Decoupling Controlling Clock Skew Effect of Serpentine Traces Controlling Crosstalk The Affect of Vias on Signal Integrity Levels of Analysis Simulation ---EMC/ Signal Integrity ---IBIS Models ---Accuracy High Density InterconnectChip Scale Packaging---Inductance ---Size ---BGA ---Ground Bounce Signal to Ground Pin Ratio Decoupling Microvia Technology ---Via-in-Pad ---Blind & Buried Vias ---Advantage & Use of Microvias PCB Trace Bandwidth ---Skin effect ---Dielectric Loss ---PCB Materials Impact of New Technology |
If you are interested in
having
this new course presented at your facility, please contact
us by phone, FAX, or e-mail to get details, and/or schedule a date.